DPEM / DCEM
DECAPSULATION REMOVAL OF DIE FROM PLASTIC OR CERAMIC PARTS AND RE-ASSEMBLY INTO EITHER HI-REL CERAMIC PACKAGES OR INTO PLASTIC INJECTION MOLDED PACKAGES.
DECAPSULATION OF DIE FOR FAILURE ANALYSIS.
DECAPSULATION AND COMPLETE REMOVAL OF DIE FOR INSERTION INTO HYBRIDS.

CUSTOM HYBRID ASSEMBLY
THICK FILM
THIN FILM
CERAMIC SUBSTRATES
HIGH RELIABILITY PACKAGES

CUSTOM PACKAGING OF IC's
CUSTOM SEMICONDUCTOR DEVICES
WAFER PROCESSING
WIRE BONDING
PACKAGE SEALING
QUALITY/RELIABILITY TESTING
100% SCREENING
QUALIFICATION TESTING

COMPONENT ANALYSIS
FAILURE ANALYSIS
MATERIAL ANALYSIS
DESTRUCTIVE PHYSICAL ANALYSIS

PACKAGE CONFIGURATIONS
KOVAR HYBRID PACKAGES
DIP (DUAL IN-LINE)
J-LEAD
PGA (PIN GRID ARRAY)
QFP (QUAD FLAT PACK)
GULL WING
LCC (LEADLESS CHIP CARRIER)
BGA (BALL GRID ARRAY)
SOT
QFP

DESIGN & BUILD
HYBRIDS
MULTI-CHIP MODULES
CUSTOM PACKAGING OF DIE
SPACELINE PROCESS - For COTS, PEMS and DPEMS, provides Radiation Tolerant Integrated Circuits for Military and Space Environments.

ASSEMBLY PROCESS
WAFER PROBING
WAFER DICING
VISUAL INSPECTION
PICK-AND-PLACE DIE SORT
HYBRID SUBSTRATE ATTACH
DIE ATTACH
WIRE BONDING
HERMETIC SEALING
PACKAGE MARKING

TESTING & SCREENING
MIL-STD-883, METHOD 5004 100% SCREENING
MIL-STD-883, METHOD 5005 GROUP B,C,D QUAL
MIL-STD-883, METHOD 5007 LOT ACCEPTANCE TEST

SAMPLE RADIATION TESTING
SINGLE EVENT UPSET
TOTAL DOSE
RADIATION EFFECTS ANALYSIS
RADIATION TOLERANCE DESIGN ANALYSIS